#include "wispGuts.h"

Macros
#define	PIN_RX_BITLINE (BIT0)
	This represents the default IO configuration for the WISP 5.0 rev 0.1 hardware. More...

#define	PRX_BITLINEOUT (P1OUT)

#define	PIN_AUX3 (BIT4)

#define	PIN_AUX3_OUT (P1OUT)

#define	PAUX3IN (P1IN)

#define	PDIR_AUX3 (P1DIR)

#define	PAUX3SEL0 (P1SEL0)

#define	PAUX3SEL1 (P1SEL1)

#define	PIN_I2C_SDA (BIT6)

#define	PI2C_SDAIN (P1IN)

#define	PDIR_I2C_SDA (P1DIR)

#define	PI2C_SDASEL0 (P1SEL0)

#define	PI2C_SDASEL1 (P1SEL1)

#define	PIN_I2C_SCL (BIT7)

#define	PDIR_I2C_SCL (P1DIR)

#define	PI2C_SCLSEL0 (P1SEL0)

#define	PI2C_SCLSEL1 (P1SEL1)

#define	PIN_UART_TX (BIT0)

#define	PUART_TXSEL0 (P2SEL0)

#define	PUART_TXSEL1 (P2SEL1)

#define	PIN_UART_RX (BIT1)

#define	PUART_RXSEL0 (P2SEL0)

#define	PUART_RXSEL1 (P2SEL1)

#define	PIN_RX (BIT3)

#define	PRXIN (P2IN)

#define	PDIR_RX (P2DIR)

#define	PRXIES (P2IES)

#define	PRXIE (P2IE)

#define	PRXIFG (P2IFG)

#define	PRXSEL0 (P2SEL0)

#define	PRXSEL1 (P2SEL1)

#define	PRX_VECTOR_DEF (PORT2_VECTOR)

#define	PIN_ACCEL_SCLK (BIT4)

#define	PDIR_ACCEL_SCLK (P2DIR)

#define	PACCEL_SCLKSEL0 (P2SEL0)

#define	PACCEL_SCLKSEL1 (P2SEL1)

#define	PIN_ACCEL_MOSI (BIT5)

#define	PDIR_ACCEL_MOSI (P2DIR)

#define	PACCEL_MOSISEL0 (P2SEL0)

#define	PACCEL_MOSISEL1 (P2SEL1)

#define	PIN_ACCEL_MISO (BIT6)

#define	PDIR_ACCEL_MISO (P2DIR)

#define	PACCEL_MISOSEL0 (P2SEL0)

#define	PACCEL_MISOSEL1 (P2SEL1)

#define	PIN_TX (BIT7)

#define	PTXOUT (P2OUT)

#define	PTXDIR (P2DIR)

#define	PIN_AUX1 (BIT4)

#define	PAUX1IN (P3IN)

#define	PDIR_AUX1 (P3DIR)

#define	PAUX1SEL0 (P3SEL0)

#define	PAUX1SEL1 (P3SEL1)

#define	PIN_AUX2 (BIT5)

#define	PAUX2IN (P3IN)

#define	PDIR_AUX2 (P3DIR)

#define	PAUX2SEL0 (P3SEL0)

#define	PAUX2SEL1 (P3SEL1)

#define	PIN_ACCEL_INT2 (BIT6)

#define	PDIR_ACCEL_INT2 (P3DIR)

#define	PACCEL_INT2SEL0 (P3SEL0)

#define	PACCEL_INT2SEL1 (P3SEL1)

#define	PIN_ACCEL_INT1 (BIT7)

#define	PDIR_ACCEL_INT1 (P3DIR)

#define	PACCEL_INT1SEL0 (P3SEL0)

#define	PACCEL_INT1SEL1 (P3SEL1)

#define	PLED1OUT (P4OUT)

#define	PIN_LED1 (BIT0)

#define	PDIR_LED1 (P4DIR)

#define	PIN_MEAS (BIT1)

#define	PMEASOUT (P4OUT)

#define	PMEASDIR (P4DIR)

#define	PMEASSEL0 (P4SEL0)

#define	PMEASSEL1 (P4SEL1)

#define	PIN_ACCEL_EN BIT2

#define	POUT_ACCEL_EN P4OUT

#define	PDIR_ACCEL_EN P4DIR

#define	PIN_ACCEL_CS BIT3

#define	POUT_ACCEL_CS P4OUT

#define	PDIR_ACCEL_CS P4DIR

#define	PIN_RX_EN (BIT5)

#define	PRXEOUT (P4OUT)

#define	PDIR_RX_EN (P4DIR)

#define	PIN_DBG0 (BIT6)

#define	PDBGOUT (P4OUT)

#define	PMEAS_ENOUT (PJOUT)

#define	PMEAS_ENDIR (PJDIR)

#define	PIN_MEAS_EN (BIT1)

#define	PDIR_LED2 (PJDIR)

#define	PLED2OUT (PJOUT)

#define	PIN_LED2 (BIT6)

#define	setupDflt_IO()

Detailed Description

This file specifies pin assignments for the particular hardware platform used. currently this file targets the WISP5-LRG platform.

Author: Aaron Parks, Justin Reina, UW Sensor Systems Lab

Todo:: The pin definitions in this file are incomplete! Use script to autogenerate these.

Macro Definition Documentation

◆ PACCEL_INT1SEL0

#define PACCEL_INT1SEL0 (P3SEL0)

◆ PACCEL_INT1SEL1

#define PACCEL_INT1SEL1 (P3SEL1)

◆ PACCEL_INT2SEL0

#define PACCEL_INT2SEL0 (P3SEL0)

◆ PACCEL_INT2SEL1

#define PACCEL_INT2SEL1 (P3SEL1)

◆ PACCEL_MISOSEL0

#define PACCEL_MISOSEL0 (P2SEL0)

◆ PACCEL_MISOSEL1

#define PACCEL_MISOSEL1 (P2SEL1)

◆ PACCEL_MOSISEL0

#define PACCEL_MOSISEL0 (P2SEL0)

◆ PACCEL_MOSISEL1

#define PACCEL_MOSISEL1 (P2SEL1)

◆ PACCEL_SCLKSEL0

#define PACCEL_SCLKSEL0 (P2SEL0)

◆ PACCEL_SCLKSEL1

#define PACCEL_SCLKSEL1 (P2SEL1)

◆ PAUX1IN

#define PAUX1IN (P3IN)

◆ PAUX1SEL0

#define PAUX1SEL0 (P3SEL0)

◆ PAUX1SEL1

#define PAUX1SEL1 (P3SEL1)

◆ PAUX2IN

#define PAUX2IN (P3IN)

◆ PAUX2SEL0

#define PAUX2SEL0 (P3SEL0)

◆ PAUX2SEL1

#define PAUX2SEL1 (P3SEL1)

◆ PAUX3IN

#define PAUX3IN (P1IN)

◆ PAUX3SEL0

#define PAUX3SEL0 (P1SEL0)

◆ PAUX3SEL1

#define PAUX3SEL1 (P1SEL1)

◆ PDBGOUT

#define PDBGOUT (P4OUT)

◆ PDIR_ACCEL_CS

#define PDIR_ACCEL_CS P4DIR

◆ PDIR_ACCEL_EN

#define PDIR_ACCEL_EN P4DIR

◆ PDIR_ACCEL_INT1

#define PDIR_ACCEL_INT1 (P3DIR)

◆ PDIR_ACCEL_INT2

#define PDIR_ACCEL_INT2 (P3DIR)

◆ PDIR_ACCEL_MISO

#define PDIR_ACCEL_MISO (P2DIR)

◆ PDIR_ACCEL_MOSI

#define PDIR_ACCEL_MOSI (P2DIR)

◆ PDIR_ACCEL_SCLK

#define PDIR_ACCEL_SCLK (P2DIR)

◆ PDIR_AUX1

#define PDIR_AUX1 (P3DIR)

◆ PDIR_AUX2

#define PDIR_AUX2 (P3DIR)

◆ PDIR_AUX3

#define PDIR_AUX3 (P1DIR)

◆ PDIR_I2C_SCL

#define PDIR_I2C_SCL (P1DIR)

◆ PDIR_I2C_SDA

#define PDIR_I2C_SDA (P1DIR)

◆ PDIR_LED1

#define PDIR_LED1 (P4DIR)

◆ PDIR_LED2

#define PDIR_LED2 (PJDIR)

◆ PDIR_RX

#define PDIR_RX (P2DIR)

◆ PDIR_RX_EN

#define PDIR_RX_EN (P4DIR)

◆ PI2C_SCLSEL0

#define PI2C_SCLSEL0 (P1SEL0)

◆ PI2C_SCLSEL1

#define PI2C_SCLSEL1 (P1SEL1)

◆ PI2C_SDAIN

#define PI2C_SDAIN (P1IN)

◆ PI2C_SDASEL0

#define PI2C_SDASEL0 (P1SEL0)

◆ PI2C_SDASEL1

#define PI2C_SDASEL1 (P1SEL1)

◆ PIN_ACCEL_CS

#define PIN_ACCEL_CS BIT3

◆ PIN_ACCEL_EN

#define PIN_ACCEL_EN BIT2

◆ PIN_ACCEL_INT1

#define PIN_ACCEL_INT1 (BIT7)

◆ PIN_ACCEL_INT2

#define PIN_ACCEL_INT2 (BIT6)

◆ PIN_ACCEL_MISO

#define PIN_ACCEL_MISO (BIT6)

◆ PIN_ACCEL_MOSI

#define PIN_ACCEL_MOSI (BIT5)

◆ PIN_ACCEL_SCLK

#define PIN_ACCEL_SCLK (BIT4)

◆ PIN_AUX1

#define PIN_AUX1 (BIT4)

◆ PIN_AUX2

#define PIN_AUX2 (BIT5)

◆ PIN_AUX3

#define PIN_AUX3 (BIT4)

◆ PIN_AUX3_OUT

#define PIN_AUX3_OUT (P1OUT)

◆ PIN_DBG0

#define PIN_DBG0 (BIT6)

◆ PIN_I2C_SCL

#define PIN_I2C_SCL (BIT7)

◆ PIN_I2C_SDA

#define PIN_I2C_SDA (BIT6)

◆ PIN_LED1

#define PIN_LED1 (BIT0)

◆ PIN_LED2

#define PIN_LED2 (BIT6)

◆ PIN_MEAS

#define PIN_MEAS (BIT1)

◆ PIN_MEAS_EN

#define PIN_MEAS_EN (BIT1)

◆ PIN_RX

#define PIN_RX (BIT3)

◆ PIN_RX_BITLINE

#define PIN_RX_BITLINE (BIT0)

This represents the default IO configuration for the WISP 5.0 rev 0.1 hardware.

CONFIGURATION

Pay very close attention to your IO direction and connections if you are modifying any of this!

Note: PIN_TX Must be BIT7 of a port register, as the register is used as a mini-FIFO in the transmit operation. BIT0 may also be used with some modification of the transmit routine. Do NOT attempt to use other pins on PTXOUT as outputs.

◆ PIN_RX_EN

#define PIN_RX_EN (BIT5)

◆ PIN_TX

#define PIN_TX (BIT7)

◆ PIN_UART_RX

#define PIN_UART_RX (BIT1)

◆ PIN_UART_TX

#define PIN_UART_TX (BIT0)

◆ PLED1OUT

#define PLED1OUT (P4OUT)

◆ PLED2OUT

#define PLED2OUT (PJOUT)

◆ PMEAS_ENDIR

#define PMEAS_ENDIR (PJDIR)

◆ PMEAS_ENOUT

#define PMEAS_ENOUT (PJOUT)

◆ PMEASDIR

#define PMEASDIR (P4DIR)

◆ PMEASOUT

#define PMEASOUT (P4OUT)

◆ PMEASSEL0

#define PMEASSEL0 (P4SEL0)

◆ PMEASSEL1

#define PMEASSEL1 (P4SEL1)

◆ POUT_ACCEL_CS

#define POUT_ACCEL_CS P4OUT

◆ POUT_ACCEL_EN

#define POUT_ACCEL_EN P4OUT

◆ PRX_BITLINEOUT

#define PRX_BITLINEOUT (P1OUT)

◆ PRX_VECTOR_DEF

#define PRX_VECTOR_DEF (PORT2_VECTOR)

◆ PRXEOUT

#define PRXEOUT (P4OUT)

◆ PRXIE

#define PRXIE (P2IE)

◆ PRXIES

#define PRXIES (P2IES)

◆ PRXIFG

#define PRXIFG (P2IFG)

◆ PRXIN

#define PRXIN (P2IN)

◆ PRXSEL0

#define PRXSEL0 (P2SEL0)

◆ PRXSEL1

#define PRXSEL1 (P2SEL1)

◆ PTXDIR

#define PTXDIR (P2DIR)

◆ PTXOUT

#define PTXOUT (P2OUT)

◆ PUART_RXSEL0

#define PUART_RXSEL0 (P2SEL0)

◆ PUART_RXSEL1

#define PUART_RXSEL1 (P2SEL1)

◆ PUART_TXSEL0

#define PUART_TXSEL0 (P2SEL0)

◆ PUART_TXSEL1

#define PUART_TXSEL1 (P2SEL1)

◆ setupDflt_IO

#define setupDflt_IO ( )

Value:

P1OUT = 0x00;\
    P2OUT = 0x00;\
    P3OUT = 0x00;\
    P4OUT = 0x00;\
    PJOUT = 0x00;\
    P1DIR = ~PIN_RX_BITLINE;\
    PJDIR = 0xFF;\
    P2DIR = ~PIN_RX;\
    P3DIR = 0xFF;\
    P4DIR = (~PIN_MEAS & ~PIN_ACCEL_EN);\

Default IO setup

Todo:: : Default for unused pins should be output, not tristate.

Todo:: : Make sure the Tx port pin should be tristate not output and unused pin to be output

Macros